Circuitos Integrados

AY-3-8910
Programmable sound generator
PDF datasheet
       
GND 1  • 40 Vcc
NC 2 39 TEST 1
ANALOG B 3 38 ANALOG C
ANALOG A 4 37 DA0
NC 5 36 DA1
IOB7 6 35 DA2
IOB6 7 34 DA3
IOB5 8 33 DA4
IOB4 9 32 DA5
IOB3 10 31 DA6
IOB2 11 30 DA7
IOB1 12 29 BC1
IOB0 13 28 BC2
IOA7 14 27 BDIR
IOA6 15 26 TEST 2/SEL
IOA5 16 25 A8
IOA4 17 24 A9
IOA3 18 23 RESET
IOA2 19 22 CLOCK
IOA1 20 21 IOA0
       
Pin Symbol Description
1 GND ground
2 NC no connection
3 ANALOG B analog output, channel B
4 ANALOG A analog output, channel A
5 NC no connection
6 IOB7 I/O port B
7 IOB6 I/O port B
8 IOB5 I/O port B
9 IOB4 I/O port B
10 IOB3 I/O port B
11 IOB2 I/O port B
12 IOB1 I/O port B
13 IOB0 I/O port B
14 IOA7 I/O port A
15 IOA6 I/O port A
16 IOA5 I/O port A
17 IOA4 I/O port A
18 IOA3 I/O port A
19 IOA2 I/O port A
20 IOA1 I/O port A
21 IOA0 I/O port A
22 CLOCK clock input
23 RESET master reset (active low)
24 A9 chip select
25 A8 chip select
26 TEST 2/SEL test pin (do not connect)
27 BDIR bus direction
28 BC2 bus control
29 BC1 bus control
30 DA7 data/address bus
31 DA6 data/address bus
32 DA5 data/address bus
33 DA4 data/address bus
34 DA3 data/address bus
35 DA2 data/address bus
36 DA1 data/address bus
37 DA0 data/address bus
38 ANALOG C analog output, channel C
39 TEST 1 test pin (do not connect)
40 Vcc supply voltage


Specifications
(typical values under recommended operating conditions, unless specified)
Parameter Value Unit
Minimum clock frequency 1 MHz
Maximum clock frequency 2.5 (AY-3-8910)
4 (YM2149) 		MHz

Notes
  • Chip is only active when A9 is low, A8 is high, and address bits DA7-DA4 are low.
  • Address bits DA3-DA0 select one of the 16 control registers.
  • For YM2149, connecting pin 26 to ground divides CLOCK by 2.
  • BDIR=0, BC2=0, BC1=0: inactive, DA7-DA0 high impedance
  • BDIR=0, BC2=0, BC1=1: latch address, DA7-DA0 are inputs
  • BDIR=0, BC2=1, BC1=0: inactive, DA7-DA0 high impedance
  • BDIR=0, BC2=1, BC1=1: read, DA7-DA0 are outputs
  • BDIR=1, BC2=0, BC1=0: latch address, DA7-DA0 are inputs
  • BDIR=1, BC2=0, BC1=1: inactive, DA7-DA0 high impedance
  • BDIR=1, BC2=1, BC1=0: write, DA7-DA0 are inputs
  • BDIR=1, BC2=1, BC1=1: latch address, DA7-DA0 are inputs
  • Control registers:
    $00 tone generator A frequency, low 8 bits
    $01 tone generator A frequency, high 4 bits
    $02 tone generator B frequency, low 8 bits
    $03 tone generator B frequency, high 4 bits
    $04 tone generator C frequency, low 8 bits
    $05 tone generator C frequency, high 4 bits
    $06 noise generator frequency, low 5 bits
    $07 I/O port and mixer control
    $08 channel A amplitude/envelope enable
    $09 channel B amplitude/envelope enable
    $0A channel C amplitude/envelope enable
    $0B envelope frequency, low 8 bits
    $0C envelope frequency, high 8 bits
    $0D envelope shape
    $0E I/O port A data
    $0F I/O port B data

Note
Data is maintained by an independent source and accuracy is not guaranteed. Check with the manufacturer's datasheet for up-to-date information.

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