Circuitos Integrados

AD7805
+3.3V to +5V quad 10-bit DAC
PDF datasheet
       
AGND 1  • 28 AVDD
VOUT B 2 27 VOUT C
VOUT A 3 26 VOUT D
REFOUT 4 25 COMP
DB9 5 24 REFIN
DB8 6 23 MODE
DB7 7 22 A0
DB6 8 21 A1
DB5 9 20 DB0
DB4 10 19 DB1
LDAC 11 18 CLR
DB3 12 17 CS
DB2 13 16 WR
DGND 14 15 DVDD
       
Pin Symbol Description
1 AGND analog ground
2 VOUT B analog output voltage
3 VOUT A analog output voltage
4 REFOUT reference output (typically 1.23V)
5 DB9 parallel data input
6 DB8 parallel data input
7 DB7 parallel data input
8 DB6 parallel data input
9 DB5 parallel data input
10 DB4 parallel data input
11 LDAC DAC register update (active low)
12 DB3 parallel data input
13 DB2 parallel data input
14 DGND digital ground
15 DVDD digital power supply
16 WR write to data register (active low)
17 CS chip select (active low)
18 CLR asynchronous clear (active low)
19 DB1 parallel data input
20 DB0 parallel data input
21 A1 DAC address input
22 A0 DAC address input
23 MODE mode input
24 REFIN external reference input
25 COMP compensation pin
26 VOUT D analog output voltge
27 VOUT C analog output voltage
28 AVDD analog power supply


Specifications
(typical values under recommended operating conditions, unless specified)
Parameter Value Unit
Slew rate 2.5 V/µs
Settling time 1.5 µs
Update rate 667 kHz
Output voltage range, twos complement coding Vbias ±15/16*Vbias
Output voltage range, offset binary coding Vbias/16 to 31/16*Vbias

Note
Data is maintained by an independent source and accuracy is not guaranteed. Check with the manufacturer's datasheet for up-to-date information.

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