Circuitos Integrados | ||
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8254 |
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Programmable interval timer |
PDF datasheet |
D7 | 1 • | 24 | Vcc |
D6 | 2 | 23 | WR |
D5 | 3 | 22 | RD |
D4 | 4 | 21 | CS |
D3 | 5 | 20 | A1 |
D2 | 6 | 19 | A0 |
D1 | 7 | 18 | CLK 2 |
D0 | 8 | 17 | OUT 2 |
CLK 0 | 9 | 16 | GATE 2 |
OUT 0 | 10 | 15 | CLK 1 |
GATE 0 | 11 | 14 | GATE 1 |
GND | 12 | 13 | OUT 1 |
Pin | Symbol | Description |
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1 | D7 | data bus |
2 | D6 | data bus |
3 | D5 | data bus |
4 | D4 | data bus |
5 | D3 | data bus |
6 | D2 | data bus |
7 | D1 | data bus |
8 | D0 | data bus |
9 | CLK 0 | counter 0 clock input |
10 | OUT 0 | counter 0 output |
11 | GATE 0 | counter 0 gate input |
12 | GND | ground |
13 | OUT 1 | counter 1 output |
14 | GATE 1 | counter 1 gate input |
15 | CLK 1 | counter 1 clock input |
16 | GATE 2 | counter 2 gate input |
17 | OUT 2 | counter 2 output |
18 | CLK 2 | counter 2 clock input |
19 | A0 | address bus |
20 | A1 | address bus |
21 | CS | chip select (active low) |
22 | RD | read enable (active low) |
23 | WR | write enable (active low) |
24 | Vcc | supply voltage |
Specifications |
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(typical values under recommended operating conditions, unless specified) |
Parameter | Value | Unit |
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Maximum clock input frequency |
8 (8254) 10 (8254-2) |
MHz |
Notes | ||||||||
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Note |
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Data is maintained by an independent source and accuracy is not guaranteed. Check with the manufacturer's datasheet for up-to-date information. |
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