| Circuitos Integrados | ||
|---|---|---|
| 7474 |
|---|
| Dual D-type flip-flop with set and reset; positive-edge trigger |
| PDF datasheet |
| 1R D | 1 • | 14 | Vcc |
| 1D | 2 | 13 | 2R D |
| 1CP | 3 | 12 | 2D |
| 1S D | 4 | 11 | 2CP |
| 1Q | 5 | 10 | 2S D |
| 1Q | 6 | 9 | 2Q |
| GND | 7 | 8 | 2Q |
| Pin | Symbol | Description |
|---|---|---|
| 1 | 1R D | asynchronous reset-direct input (active low) |
| 2 | 1D | data input |
| 3 | 1CP | clock input (low-to-high edge-triggered) |
| 4 | 1S D | asynchronous set-direct input (active low) |
| 5 | 1Q | true output |
| 6 | 1Q | complement output |
| 7 | GND | ground |
| 8 | 2Q | complement output |
| 9 | 2Q | true output |
| 10 | 2S D | asynchronous set-direct input (active low) |
| 11 | 2CP | clock input (low-to-high edge-triggered) |
| 12 | 2D | data input |
| 13 | 2R D | asynchronous reset-direct input (active low) |
| 14 | Vcc | supply voltage |
| Specifications |
|---|
| (typical values under recommended operating conditions, unless specified) |
| Parameter | Value | Unit |
|---|---|---|
| Propagation delay, nCP to nQ, nQ |
14 (74HC) 15 (74HCT) |
ns |
| Propagation delay, nS D to nQ, nQ |
15 (74HC) 18 (74HCT) |
ns |
| Propagation delay, nR D to nQ, nQ |
16 (74HC) 18 (74HCT) |
ns |
| Maximum clock frequency |
76 (74HC) 59 (74HCT) |
MHz |
| Note |
|---|
| Data is maintained by an independent source and accuracy is not guaranteed. Check with the manufacturer's datasheet for up-to-date information. |
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