Circuitos Integrados

74594
8-bit shift register with output register
PDF datasheet
       
Q1 1  • 16 Vcc
Q2 2 15 Q0
Q3 3 14 DS
Q4 4 13 STR
Q5 5 12 STCP
Q6 6 11 SHCP
Q7 7 10 SHR
GND 8 9 Q7S
       
Pin Symbol Description
1 Q1 parallel data output
2 Q2 parallel data output
3 Q3 parallel data output
4 Q4 parallel data output
5 Q5 parallel data output
6 Q6 parallel data output
7 Q7 parallel data output
8 GND ground
9 Q7S serial data output
10 SHR shift register reset (active low)
11 SHCP shift register clock input
12 STCP storage register clock input
13 STR storage register reset (active low)
14 DS serial data input
15 Q0 parallel data output
16 Vcc supply voltage


Specifications
(typical values under recommended operating conditions, unless specified)
Parameter Value Unit
Propagation delay, SHCP to Q7S 13 (74HC)
15 (74HCT)
ns
Propagation delay, STCP to Qn 13 (74HC)
15 (74HCT)
ns
Maximum frequency, SHCP or STCP 100 (74HC/74HCT) MHz

Note
Data is maintained by an independent source and accuracy is not guaranteed. Check with the manufacturer's datasheet for up-to-date information.

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