Circuitos Integrados

62256
32K x 8 static RAM
PDF datasheet
       
A14 1  • 28 Vcc
A12 2 27 WE
A7 3 26 A13
A6 4 25 A8
A5 5 24 A9
A4 6 23 A11
A3 7 22 OE
A2 8 21 A10
A1 9 20 CE
A0 10 19 I/O7
I/O0 11 18 I/O6
I/O1 12 17 I/O5
I/O2 13 16 I/O4
GND 14 15 I/O3
       
Pin Symbol Description
1 A14 address input
2 A12 address input
3 A7 address input
4 A6 address input
5 A5 address input
6 A4 address input
7 A3 address input
8 A2 address input
9 A1 address input
10 A0 address input
11 I/O0 data input/output
12 I/O1 data input/output
13 I/O2 data input/output
14 GND ground
15 I/O3 data input/output
16 I/O4 data input/output
17 I/O5 data input/output
18 I/O6 data input/output
19 I/O7 data input/output
20 CE chip enable (active low)
21 A10 address input
22 OE output enable (active low)
23 A11 address input
24 A9 address input
25 A8 address input
26 A13 address input
27 WE write enable (active low)
28 Vcc supply voltage

Notes
  • Data is written when CE is low and WE is low.
  • Data is read when CE is low, OE is low, and WE is high.
  • The input/output pins assume a high-impedance state if CE is high.

Note
Data is maintained by an independent source and accuracy is not guaranteed. Check with the manufacturer's datasheet for up-to-date information.

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