Circuitos Integrados

54374
Octal D-type edge-triggered flip-flops with 3-state outputs
PDF datasheet
       
OE 1  • 20 Vcc
1Q 2 19 8Q
1D 3 18 D8D7
2D 4 17 7D
2Q 5 16 7Q
3Q 6 15 6Q
3D 7 14 6D
4D 8 13 5D
4Q 9 12 5Q
GND 10 11 CLK
       
Pin Symbol Description
1 OE output enable (active low)
2 1Q flip-flop output
3 1D data input
4 2D data input
5 2Q flip-flop output
6 3Q flip-flop output
7 3D data input
8 4D data input
9 4Q flip-flop output
10 GND ground
11 CLK clock input (low-to-high, edge-triggered)
12 5Q flip-flop output
13 5D data input
14 6D data input
15 6Q flip-flop output
16 7Q flip-flop output
17 7D data input
18 D8D7 data input
19 8Q flip-flop output
20 Vcc supply voltage


Specifications
(typical values under recommended operating conditions, unless specified)
Parameter Value Unit
Supply Voltage range -0.5 to 7 V
Input Voltage range -0.5 to 7 V
Recommended Voltage range 4.5 to 5.5 V
High level input voltage 2 V
Low-level input voltage 0.7 (54AL)
0.8 (74AL) 		V
High-level output current -1 (54AL)
-2.6 (74AL) 		mA
Low-level output current 12 (54AL)
24 (74AL) 		mA
Operating Temp -55 to +125 (54AL)
0 to +70 (74AL) 		degC

Notes
  • OE does not affect internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state
  • released april 1982, revised november 1999

Note
Data is maintained by an independent source and accuracy is not guaranteed. Check with the manufacturer's datasheet for up-to-date information.

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