Circuitos Integrados

4099
8-bit addressable latch
PDF datasheet
       
Q7 1  • 16 Vcc
RESET 2 15 Q6
DATA 3 14 Q5
WRITE 4 13 Q4
A0 5 12 Q3
A1 6 11 Q2
A2 7 10 Q1
GND 8 9 Q0
       
Pin Symbol Description
1 Q7 latch output
2 RESET master reset (all bits to 0; active high)
3 DATA data input
4 WRITE write enable (active low)
5 A0 address input
6 A1 address input
7 A2 address input
8 GND ground
9 Q0 latch output
10 Q1 latch output
11 Q2 latch output
12 Q3 latch output
13 Q4 latch output
14 Q5 latch output
15 Q6 latch output
16 Vcc supply voltage

Note
Data is maintained by an independent source and accuracy is not guaranteed. Check with the manufacturer's datasheet for up-to-date information.

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