Circuitos Integrados

4029
Synchronous 4-bit up/down binary/decade counter
PDF datasheet
       
PL 1  • 16 Vcc
Q3 2 15 CP
P3 3 14 Q2
P0 4 13 P2
CE 5 12 P1
Q0 6 11 Q1
TC 7 10 UP/DN
GND 8 9 BIN/DEC
       
Pin Symbol Description
1 PL parallel load
2 Q3 buffered parallel output
3 P3 parallel data input
4 P0 parallel data input
5 CE count enable (active low)
6 Q0 buffered parallel output
7 TC terminal count output (active low)
8 GND ground
9 BIN/DEC binary/decade control input
10 UP/DN up/down control input
11 Q1 buffered parallel output
12 P1 parallel data input
13 P2 parallel data input
14 Q2 buffered parallel output
15 CP clock input (low-to-high edge-triggered)
16 Vcc supply voltage

Note
Data is maintained by an independent source and accuracy is not guaranteed. Check with the manufacturer's datasheet for up-to-date information.

BACK