Circuitos Integrados | ||
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4027 |
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Dual J-K flip-flop with set and clear |
PDF datasheet |
2Q | 1 • | 16 | Vcc |
2Q | 2 | 15 | 1Q |
2CP | 3 | 14 | 1Q |
2CD | 4 | 13 | 1CP |
2K | 5 | 12 | 1CD |
2J | 6 | 11 | 1K |
2SD | 7 | 10 | 1J |
GND | 8 | 9 | 1SD |
Pin | Symbol | Description |
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1 | 2Q | true output |
2 | 2Q | complement output |
3 | 2CP | clock input (low-to-high edge-triggered) |
4 | 2CD | asynchronous clear-direct input |
5 | 2K | synchronous input |
6 | 2J | synchronous input |
7 | 2SD | asynchronous set-direct input |
8 | GND | ground |
9 | 1SD | asynchronous set-direct input |
10 | 1J | asynchronous input |
11 | 1K | asynchronous input |
12 | 1CD | asynchronous clear-direct input |
13 | 1CP | clock input (low-to-high edge-triggered) |
14 | 1Q | complement output |
15 | 1Q | true output |
16 | Vcc | supply voltage |
Note |
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Data is maintained by an independent source and accuracy is not guaranteed. Check with the manufacturer's datasheet for up-to-date information. |
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