Integrated Circuits

7493
4-bit binary ripple counter
PDF datasheet
       
CP 1 1  • 14 CP 0
MR1 2 13 NC
MR2 3 12 Q0
NC 4 11 Q3
Vcc 5 10 GND
NC 6 9 Q1
NC 7 8 Q2
       
Pin Symbol Description
1 CP 1 clock input, 2nd, 3rd and 4th section (high-to-low edge-triggered)
2 MR1 asynchronous master reset
3 MR2 asynchronous master reset
4 NC no connection
5 Vcc supply voltage
6 NC no connection
7 NC no connection
8 Q2 counter output
9 Q1 counter output
10 GND ground
11 Q3 counter output
12 Q0 counter output
13 NC no connection
14 CP 0 clock input, 1st section (high-to-low edge-triggered)


Specifications
(typical values under recommended operating conditions, unless specified)
Parameter Value Unit
Propagation delay, CP 0 to Q0 12 (74HC)
15 (74HCT) 		ns
Maximum clock frequency 100 (74HC)
77 (74HCT) 		MHz

Notes
  • State changes of Qn outputs do not occur simultaneously.
  • Setting both MR1 and MR2 high resets the counter to zero.
  • For a 4-bit counter, connect Q0 to CP 1 , and apply count pulses to CP 0 .
  • For a 3-bit counter, apply count pulses to CP 1 .

Note
Data is maintained by an independent source and accuracy is not guaranteed. Check with the manufacturer's datasheet for up-to-date information.

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