Integrated Circuits |
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74374 |
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Octal D-type flip-flop; positive-edge trigger; 3-state |
PDF datasheet |
OE | 1 • | 20 | Vcc |
Q0 | 2 | 19 | Q7 |
D0 | 3 | 18 | D7 |
D1 | 4 | 17 | D6 |
Q1 | 5 | 16 | Q6 |
Q2 | 6 | 15 | Q5 |
D2 | 7 | 14 | D5 |
D3 | 8 | 13 | D4 |
Q3 | 9 | 12 | Q4 |
GND | 10 | 11 | CP |
Pin | Symbol | Description |
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1 | OE | output enable (active low) |
2 | Q0 | flip-flop output |
3 | D0 | data input |
4 | D1 | data input |
5 | Q1 | flip-flop output |
6 | Q2 | flip-flop output |
7 | D2 | data input |
8 | D3 | data input |
9 | Q3 | flip-flop output |
10 | GND | ground |
11 | CP | clock input (low-to-high, edge-triggered) |
12 | Q4 | flip-flop output |
13 | D4 | data input |
14 | D5 | data input |
15 | Q5 | flip-flop output |
16 | Q6 | flip-flop output |
17 | D6 | data input |
18 | D7 | data input |
19 | Q7 | flip-flop output |
20 | Vcc | supply voltage |
Specifications |
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(typical values under recommended operating conditions, unless specified) |
Parameter | Value | Unit |
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Propagation delay, CP to Qn |
15 (74HC) 13 (74HCT) |
ns |
Maximum clock frequency |
77 (74HC) 48 (74HCT) |
MHz |
Note |
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Data is maintained by an independent source and accuracy is not guaranteed. Check with the manufacturer's datasheet for up-to-date information. |
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